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RFD8P06LE, RFD8P06LESM, RFP8P06LE
Data Sheet July 1999 File Number
4273.1
8A, 60V, 0.300 Ohm, ESD Rated, Logic Level, P-Channel Power MOSFET
These products are P-Channel power MOSFETs manufactured using the MegaFET process. This process, which uses feature sizes approaching those of LSI circuits, gives optimum utilization of silicon, resulting in outstanding performance. They were designed for use in applications such as switching regulators, switching converters, motor drivers, and relay drivers. These transistors can be operated directly from integrated circuits. Formerly developmental type TA49203.
Features
* 8A, 60V * rDS(ON) = 0.300 * 2kV ESD Protected * Temperature Compensating PSPICE(R) Model * PSPICE Thermal Model * Peak Current vs Pulse Width Curve * UIS Rating Curve * 175oC Operating Temperature
Ordering Information
PART NUMBER RFD8P06LE RFD8P06LESM RFP8P06LE PACKAGE TO-251AA TO-252AA TO-220AB BRAND F8P6LE F8P6LE FP8P06LE
Symbol
D
G
NOTE: When ordering, use the entire part number. Add the suffix 9A to obtain the TO-252AA variant in the tape and reel, i.e., RFD8P06LESM9A.
S
Packaging
JEDEC TO-251AA
SOURCE DRAIN GATE GATE SOURCE
JEDEC TO-252AA
DRAIN (FLANGE)
DRAIN (FLANGE)
JEDEC TO-220AB
SOURCE DRAIN GATE DRAIN (FLANGE)
7-11
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures. PSPICE(R) is a registered trademark of MicroSim Corporation. http://www.intersil.com or 407-727-9207 | Copyright (c) Intersil Corporation 1999
RFD8P06LE, RFD8P06LESM, RFP8P06LE
Absolute Maximum Ratings
TC = 25oC Unless Otherwise Specified RFD8P06LE, RFD8P06LESM, RFP8P06LE -60 -60 -8 -6.3 See Figure 5 10 48 0.32 See Figure 6 -55 to 175 300 UNITS V V A A V W W/oC
oC oC
Drain to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VDS Drain to Gate Voltage (RGS = 20k) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR Continuous Drain Current TC = 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID TC = 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VGS Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD Dissipation Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Single Pulse Avalanche Energy Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG Maximum Lead Temperature for Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL (0.063in (1.6mm) from case for 10s)
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE: 1. TJ = 25oC to 150oC.
Electrical Specifications
PARAMETER
TC = 25oC Unless Otherwise Specified SYMBOL BVDSS VGS(TH) IDSS IGSS rDS(ON) tON td(ON) tr td(OFF) tf tOFF Qg(TOT) Qg(-5) Qg(TH) CISS COSS CRSS RJC RJA TO-251AA, TO-252AA TO-220AB VGS = 0 to -10V VGS = 0 to -5V VGS = 0 to -1V VDD = -48V, ID 8A, RL = 6 Ig(REF) = -0.2mA (Figure 14) TEST CONDITIONS ID = 250A, VGS = 0V (Figure 11) VGS = VDS, ID = 250A (Figure 12) VDS =- 60V, VGS = 0V VGS = 10V ID = 8A, VGS = -5V (Figure 9, 10) ID = 8A, VGS = -4.5V (Figure 9, 10) VDD = -30V, ID 8A, RGS = 9.1, RL = 3.75 (Figure 13) TJ = 25oC TJ = 150oC MIN -60 -1 TYP 10 50 30 20 25 15 1.2 675 175 50 MAX -2 -1 -50 10 0.300 0.330 90 75 30 18 1.5 3.125 100 80 UNITS V V A A A ns ns ns ns ns ns nC nC nC pF pF pF
oC/W oC/W oC/W
Drain to Source Breakdown Voltage Gate Threshold Voltage Zero Gate Voltage Drain Current
Gate to Source Leakage Current On Resistance (Note 1)
Turn-On Time Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Turn-Off Time Total Gate Charge Gate Charge at -5V Threshold Gate Charge Input Capacitance Output Capacitance Reverse Transfer Capacitance Thermal Resistance Junction to Case Thermal Resistance Junction to Ambient
VDS =- 25V, VGS = 0V, f = 1MHz (Figure 15)
Source to Drain Diode Specifications TC = 25oC Unless Otherwise Specified
PARAMETER Source to Drain Diode Voltage (Note 1) Reverse Recovery Time NOTE: 2. Pulse Test: Pulse width 300s, Duty Cycle 2%. SYMBOL VSD trr TEST CONDITIONS TJ = 25oC, ISD =- 8A, VGS = 0V TJ = 25oC, ISD =- 8A, dISD/dt = 100A/s MIN TYP MAX -1.5 125 UNITS V ns
7-12
RFD8P06LE, RFD8P06LESM, RFP8P06LE Typical Performance Curves
1.2 POWER DISSIPATION MULTIPLIER 1.0 0.8 0.6 0.4 0.2 0 0 25 125 50 75 100 TC , CASE TEMPERATURE (oC) 150 175 ID, DRAIN CURRENT (A)
Unless Otherwise Specified
-10
-8
-6
-4
-2
0 25
50
75
100
125
150
175
TC, CASE TEMPERATURE (oC)
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE TEMPERATURE
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs CASE TEMPERATURE
2.0 1.0 ZJC, NORMALIZED THERMAL IMPEDANCE 0.5 0.2 0.1 0.1 0.05 0.02 0.01 t1 t2 PDM
SINGLE PULSE
0.01 10-5 10-4 10-3 10-2 10-1
NOTES:DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZJC x RJC+ TC 100 101
t, RECTANGULAR PULSE DURATION (s)
FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE
-100
TC = 25oC, TJ = MAX RATED
-102 TC = 25oC FOR TEMPERATURES ABOVE 25oC DERATE PEAK CURRENT CAPABILITY AS FOLLOWS: 175 - T C I = I 25 ----------------------- 150
100s
-10 1ms 10ms 100ms DC OPERATION IN THIS AREA MAY BE LIMITED BY rDS(ON)
IDM , PEAK CURRENT (A)
ID , DRAIN CURRENT (A)
VGS = -10V
-1
VGS = -5V -10 TRANSCONDUCTANCE MAY LIMIT CURRENT IN THIS REGION 10-5 10-4 10-3 10-2 10-1 t, PULSE WIDTH (ms) 100 101
VDS(MAX) = -60V -100
-0.1 -1
-5
-10 VDS , DRAIN TO SOURCE VOLTAGE (V)
FIGURE 4. FORWARD BIAS SAFE OPERATING AREA
FIGURE 5. PEAK CURRENT CAPABILITY
7-13
RFD8P06LE, RFD8P06LESM, RFP8P06LE Typical Performance Curves
-30 IAS , AVALANCHE CURRENT (A) STARTING TJ = 25oC -10
Unless Otherwise Specified
-30
ID, DRAIN CURRENT (A)
PULSE DURATION = 250s DUTY CYCLE = 0.5% MAX -25 TC = 25oC VGS = -10V -20 -15 -10 -5 0 0 -1.5 -3.0 -4.5 -6.0 -7.5 VDS, DRAIN TO SOURCE VOLTAGE (V) VGS = -5V VGS = -4.5V VGS = -4V VGS = -3V
STARTING TJ = 150oC If R = 0 tAV = (L) (IAS) / (1.3RATED BVDSS - VDD) If R 0 tAV = (L/R) ln [(IAS*R) / (1.3 RATED BVDSS - VDD) + 1] -1 0.01 0.1 1 10 tAV, TIME IN AVALANCHE (ms)
NOTE: Refer to Intersil Application Notes AN9321 and AN9322. FIGURE 6. UNCLAMPED INDUCTIVE SWITCHING CAPABILITY FIGURE 7. SATURATION CHARACTERISTICS
-30
ID(ON), ON-STATE DRAIN CURRENT (A) -55oC
600 25oC rDS(ON), ON-STATE RESISTANCE (m) PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX VDD = -15V ID = -8A ID = -4A ID = -2A ID = -1A
-25 -20 -15 -10 -5 0
0
500
175oC
400
300 PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX -2.5 -3.0 -3.5 -4.0 -4.5 -5.0
-1.5 -3.0 -4.5 -6.0 VGS, GATE TO SOURCE VOLTAGE (V)
-7.5
200 -2.0
VGS, GATE TO SOURCE VOLTAGE (V)
FIGURE 8. TRANSFER CHARACTERISTICS
FIGURE 9. DRAIN TO SOURCE ON RESISTANCE vs GATE VOLTAGE AND DRAIN CURRENT
2.25 NORMALIZED ON RESISTANCE
NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE
PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX 2.00 VGS = -5V, ID = -8A 1.75 1.50 1.25 1.00 0.75 0.50 -80
2.0 1.15 1.1 1.05 1.0 0.95 0.9 -80
ID = -250A
-40
0
40
80
120
160
200
-40
0
40
80
120
160
200
TJ , JUNCTION TEMPERATURE (oC)
TJ , JUNCTION TEMPERATURE (oC)
FIGURE 10. NORMALIZED DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE
FIGURE 11. NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE vs JUNCTION TEMPERATURE
7-14
RFD8P06LE, RFD8P06LESM, RFP8P06LE Typical Performance Curves
1.4 VGS = VDS, ID = -250A SWITCHING TIME (ns)
Unless Otherwise Specified
125
VDD = -30V, ID = -8A, RL= 3.75
tr
100
NORMALIZED GATE THRESHOLD VOLTAGE
1.2
75 td(OFF) 50
1.0
tf
0.8
25 td(ON)
0.6 -80
0 -40 0 40 80 120 160 TJ, JUNCTION TEMPERATURE (oC) 200 0 20 30 40 10 RGS, GATE TO SOURCE RESISTANCE () 50
FIGURE 12. NORMALIZED GATE THRESHOLD VOLTAGE vs JUNCTION TEMPERATURE
-60 VDS , DRAIN TO SOURCE VOLTAGE (V) VDD =BVDSS -45 RL = 7.5 IG(REF) = -0.20mA 0.75 BVDSS 0.50 BVDSS -15 0.25 BVDSS VGS = -5V 0 20 0.00 0.75 BVDSS 0.50 BVDSS 0.25 BVDSS -1.25 VDD = BVDSS -3.75 -5.00 VGS , GATE TO SOURCE VOLTAGE (V)
FIGURE 13. SWITCHING TIME AS A FUNCTION OF GATE RESISTANCE
1000 VGS = 0V, f = 0.1MHz CISS = CGS + CGD CRSS = CGD COSS CDS + CGD
800 C, CAPACITANCE (pF) CISS 600
-30
-2.50
400 COSS 200 CRSS 0 0 -10 -20 -30 -40 -50 VDS , DRAIN TO SOURCE VOLTAGE (V) -60
IG(REF) IG(ACT)
t, TIME ( s)
80
IG(REF) IG(ACT)
NOTE: Refer to Intersil Application Notes AN7254 and AN7260. FIGURE 14. NORMALIZED SWITCHING WAVEFORMS FOR CONSTANT GATE CURRENT FIGURE 15. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
Test Circuits and Waveforms
VDS tAV L VARY tP TO OBTAIN REQUIRED PEAK IAS RG 0
VDD
+
0V tP -VGS
DUT
VDD
IAS tP VDS BVDSS
IAS 0.01
FIGURE 16. UNCLAMPED ENERGY TEST CIRCUIT
FIGURE 17. UNCLAMPED ENERGY WAVEFORMS
7-15
RFD8P06LE, RFD8P06LESM, RFP8P06LE Test Circuits and Waveforms
(Continued)
tON td(ON) tr RL +
tOFF td(OFF) tf 10% 10%
0
VDS 0V RGS -VGS DUT 0
90%
90%
10% 50% VGS PULSE WIDTH 90% 50%
FIGURE 18. SWITCHING TIME TEST CIRCUIT
FIGURE 19. RESISTIVE SWITCHING WAVEFORMS
VDS RL
0 VGS= -1V -VGS VDD
+
Qg(TH)
VDS
VGS= -5V Qg(-5)
VGS
VDD DUT -IG(REF) 0 Ig(REF) Qg(TOT)
VGS= -10V
FIGURE 20. GATE CHARGE TEST CIRCUIT
FIGURE 21. GATE CHARGE WAVEFORMS
7-16
RFD8P06LE, RFD8P06LESM, RFP8P06LE PSpice Electrical Model
.SUBCKT RFD8P06LE 2 1 3
CA 12 8 1.50e-9 CB 15 14 1.50e-9 CIN 6 8 6.30e-10 DBODY 5 7 DBDMOD DBREAK 7 11 DBKMOD DESD1 91 9 DESD1MOD DESD2 91 7 DESD2MOD DPLCAP 10 6 DPLCAPMOD EBREAK 5 11 17 18 -67.9 EDS 14 8 5 8 1 EGS 13 8 6 8 1 ESG 5 10 8 6 1 EVTHRES 21 6 19 8 1 EVTEMP 6 20 18 22 1 IT 8 17 1 LDRAIN 2 5 1e-10 LGATE 1 9 2.92e-9 LSOURCE 3 7 2.92e-9 MSTRONG 16 6 8 8 MstrongMOD MMED 16 6 8 8 MmedMOD MWEAK 16 21 8 8 MweakMOD RBREAK 17 18 RBKMOD 1 RDRAIN 50 16 RDSMOD 95e-3 RGATE 9 20 2.89 RIN 6 8 1e9 RSCL1 5 51 RSCLMOD 1e-6 RSCL2 5 50 1e3 RSOURCE 8 7 RSourceMOD 97e-3 RVTHRES 22 8 RVTHRESMOD 1 RVTEMP 18 19 RVTEMPMOD 1 S1A 6 12 13 8 S1AMOD S1B 13 12 13 8 S1BMOD S2A 6 15 14 13 S2AMOD S2B 13 15 14 13 S2BMOD VBAT 22 19 DC 1 ESCL 51 50 VALUE={(V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)*1e6/26,7))} .MODEL DBDMOD D (IS=2.5e-12 RS=4e-2 IKF=0.01 N=0.97 TIKF=0.012 TRS1=0.8e-4 TRS2=-5e-6 CJO=5.25e-10 VJ=0.75 M=0.41 TT=7.50e-8) .MODEL DBKMOD D (IKF=5 N=0.75 RS=0.245 TRS1=1e-3 TRS2=1.6e-4) .MODEL DESD1MOD D (BV=16.4 TBV1=-1.25e-3 TBV2=5.79e-7 RS=36 NBV=50 IBV=7e-6) .MODEL DESD2MOD D (BV=16.2 TBV1=-8.3e-4 TBV2=8.9e-7 NBV=50 IBV=7e-6) .MODEL DPLCAPMOD D (CJO=4.25e-10 IS=1e-30 N=10 VJ=0.499 M=0.561) .MODEL MSTRONGMOD PMOS (VTO=-1.91 KP=11.55 IS=1e-30 N=10 TOX=1 L=1u W=1u) .MODEL MMEDMOD PMOS (VTO=-1.51 KP=0.95 IS=1e-30 N=10 TOX=1 L=1u W=1u) .MODEL MWEAKMOD PMOS (VTO=-1.18 KP=0.03 IS=1e-30 N=10 TOX=1 L=1u W=1u) .MODEL RBKMOD RES (TC1=1.045e-3 TC2=-3.5e-7) .MODEL RDSMOD RES (TC1=0.92e-2 TC2=1.55e-5) .MODEL RSOURCEMOD RES (TC1=2e-3 TC2=0.5e-6) .MODEL RSCLMOD RES (TC1=2e-3 TC2=0) .MODEL RVTHRESMOD RES (TC1=-2.5e-3 TC2=0) .MODEL RVTEMPMOD RES (TC1=-1.55e-3 TC2=7.5e-6) .MODEL S1AMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=5.25 VOFF=1.75) .MODEL S1BMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=1.75 VOFF=5.25) .MODEL S2AMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=0.5 VOFF=-0.5) .MODEL S2BMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=-0.5 VOFF=0.5) .ENDS
REV 7/29/96
10
ESG
LDRAIN + 5 RLDRAIN EBREAK ESLC 50 DBODY + 17 18 DRAIN 2 RSLC1 51
-
8 6
RSLC2
5 51 DPLCAP EVTHRES + 19 8 6
LGATE GATE 1 RLGATE DESD1 91 DESD2 RGATE 9
EVTEMP
-
20
18 + 22
CIN
S1A 12 S1B CA 13 + EGS 6 8 13 8
S2A 14 13 S2B CB + EDS 5 8 14 IT 15 17
-
-
NOTE: For further discussion of the PSPICE model consult A New PSPICE Sub-circuit for the Power MOSFET Featuring Global Temperature Options; authored by William J. Hepp and C. Frank Wheatley.
7-17
+
-
-
RDRAIN 21 16 MWEAK MMED MSTRO 8 RSOURCE DBREAK 11
LSOURCE 7 RLSOURCE SOURCE 3
RBREAK 18 RVTEMP 19
VBAT +
8 22 RVTHRES
RFD8P06LE, RFD8P06LESM, RFP8P06LE PSpice Thermal Model
REV 7/29/96
RFP8P06LE CTHERM1 7 6 1.3e-4 CTHERM2 6 5 4.5e-4 CTHERM3 5 4 1e-3 CTHERM4 4 3 2e-3 CTHERM5 3 2 1.5e-2 CTHERM6 2 1 0.55 RTHERM1 7 6 3.0e-2 RTHERM2 6 5 5.0e-2 RTHERM3 5 4 0.1 RTHERM4 4 3 1.15 RTHERM5 3 2 1.20 RTHERM6 2 1 0.55 7 JUNCTION
RTHERM1
CTHERM1
6
RTHERM2
CTHERM2
5
RFD8P06LE, RFD8P06LESM CTHERM1 7 6 1.3e-4 CTHERM2 6 5 4.5e-4 CTHERM3 5 4 1e-3 CTHERM4 4 3 2e-3 CTHERM5 3 2 1.5e-2 CTHERM6 2 1 0.12 RTHERM1 7 6 3.0e-2 RTHERM2 6 5 5.0e-2 RTHERM3 5 4 0.1 RTHERM4 4 3 1.15 RTHERM5 3 2 1.20 RTHERM6 2 1 0.55
RTHERM3
CTHERM3
4
RTHERM4
CTHERM4
3
RTHERM5
CTHERM5
2
RTHERM6
CTHERM6
1
CASE
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Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
Sales Office Headquarters
NORTH AMERICA Intersil Corporation P. O. Box 883, Mail Stop 53-204 Melbourne, FL 32902 TEL: (407) 724-7000 FAX: (407) 724-7240 EUROPE Intersil SA Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05 ASIA Intersil (Taiwan) Ltd. 7F-6, No. 101 Fu Hsing North Road Taipei, Taiwan Republic of China TEL: (886) 2 2716 9310 FAX: (886) 2 2715 3029
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